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Monday September 14, 2026 15:15 - 16:15 MDT
The architecture of legacy compilers presents limitations for modern software development. As codebases scale, developers face increased compilation times. While language complexity is often cited, key architectural bottlenecks include pointer-chasing across deeply nested ASTs (cache misses), single-threaded type resolution, and significant thread-lock contention (RwLock) during parallel semantic analysis. What happens when we discard the Abstract Syntax Tree entirely and apply strict Data-Oriented Design to the compiler itself?

In this session, we will explore the internal architecture of the Vx compiler frontend—a heterogeneous systems programming language to safely maximize utilization of available CPU cores. We will dissect how to translate complex, tree-like program semantics into flat, contiguous arrays of 256-bit bit-packed Global Identifiers (GIDs).

By stepping away from traditional recursive tree-walking and object-oriented compiler design, attendees will learn how to implement high-throughput parallel pipelines.

This talk is not just for language designers. The architectural patterns used to build the Vx compiler—flattening graphs into arrays, deferred identity, and lock-free synchronization boundaries—are directly applicable to any C++ developer building high-performance, multithreaded systems.

Presenters
avatar for Aditya Kumar

Aditya Kumar

Software Engineer, Google
I've been working on LLVM since 2012. I've contributed to modern compiler optimizations like GVNHoist, Hot Cold Splitting, Hexagon specific optimizations, clang static analyzer, libcxx, libstdc++, and graphite framework of gcc.
Monday September 14, 2026 15:15 - 16:15 MDT
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