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Thursday September 17, 2026 09:00 - 10:00 MDT
In low-latency C++, correctness is table stakes. What separates good systems from great ones is predictability — the ability to hit your deadline not just on average, but at the 99th and 99.9th percentile, where real workloads live. Latency is a feature, and if you don't design for it explicitly, you lose it accidentally.

This talk is a practitioner's guide to writing C++ that behaves predictably under load, drawn from experience building and tuning low-latency systems on Microsoft's Azure Core platform. We start from the mental models that matter most — CPU-centric thinking, the latency stack from L1 to DRAM, and why minimizing work, unpredictability, and memory movement is the foundation of everything else — and then work through the layers of the stack where latency is won or lost in practice.

Through live demos and benchmark data on both x86 and ARM, we'll cover:

STL containers as latency contracts — why most latency bugs start with the wrong container, the real cost of dynamic reallocation, and the measurable wins from reserve() and custom allocators.

Memory layout and cache behavior — struct layout and alignment (and how it differs on x86-64 vs. ARM64), AoS vs. SoA trade-offs, hot/cold data separation, false sharing, NUMA, and TLB pressure.

Atomics vs. mutexes — when atomics actually lose to mutexes, why architecture and memory model dictate the answer, and how to choose between them in real code.

Threading and scheduling — fixed vs. dynamic thread pools, context-switch and migration costs, and why understanding the OS is half the battle.

Benchmarking and observability — why microbenchmarks lie, how to avoid measurement bias and jitter, why latency histograms beat averages, and why "absolute benchmark" is a myth.

You'll leave with a practical playbook for designing and measuring low-latency C++ systems, an honest understanding of why benchmarks from one machine rarely generalize to another, and a sharper instinct for the silent killers — allocations, branches, cache misses, and synchronization primitives — that don't show up in code review but do show up in production.

Presenters
avatar for Sampad Acharya

Sampad Acharya

Senior Quant Developer, Fixed Income Trading, Bloomberg
Sampad Acharya is a senior software engineer at Bloomberg, where he specializes in low‑latency, cache‑optimized C++ systems for trading and real‑time environments. He has worked in software development for six years. Sampad is deeply interested in how algorithms behave in the... Read More →
Thursday September 17, 2026 09:00 - 10:00 MDT
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