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Subject: Algorithms clear filter
Monday, September 14
 

11:00 MDT

From 20 Nanoseconds to One: Optimizing Bishop, Rook, and Queen Move Generation in a Chess Engine
Monday September 14, 2026 11:00 - 12:00 MDT
A chess engine must search millions of positions per second. Move generation is often a bottleneck. Generating moves for knights, kings, and pawns are computationally cheap (~1 nanosecond). However, rooks, bishops, and queens (aka "sliding pieces") present a unique challenge: their movement depends on the placement of other pieces. This makes on-demand generation too slow (20+ nanoseconds) and naively-implemented lookup tables impractical (requiring zettabytes of RAM).

We will start by reviewing the core data structures in a chess engine and the logic behind move generation. Then, we will explore "magic bitboards", a perfect hashing technique that enables sliding piece move generation in ~1 nanosecond. We will look at how to implement this in modern C++, comparing hardware-specific instructions like PEXT (Parallel Bits Extract) against a portable software approach. Finally, we will discuss the practical challenges of generating the data structures required for magic bitboards, including the limitations of consteval and how to integrate build-time table generation into the build process using Bazel.

To ground these concepts, we will be referencing implementation details and code from my C++ chess engine, FollyChess.

Presenters
AN

Aryan Naraghi

Aryan Naraghi is a Staff Software Engineer at Google specializing in distributed systems. Over the past 14 years, he has built critical infrastructure across Google (including BigQuery, Cloud Run, Compute Engine, and Vertex AI) and previously led data strategy as Head of Data Analytics... Read More →
Monday September 14, 2026 11:00 - 12:00 MDT
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11:00 MDT

Same Bits Without Losing MIPS: Reproducible Numerics at Full Hardware Speed
Monday September 14, 2026 11:00 - 12:00 MDT
Floating point has a reputation for betrayal. Change the thread count, vector width, compiler flags, reduction tree, or target architecture, and the low bits can move. Parallel algorithms make this worse: the standard often specifies the operation, but not the numerical expression whose result must be reproduced. This talk asks a provocative question: what if reproducible numerics did not have to be slow?

We will show reproducible, deterministic implementations of reduce and scan that exhibit better error behavior on hostile floating-point workloads and can match or beat conventional standard-library implementations on realistic workloads. The trick is not to freeze the execution schedule. It is to specify the expression being computed, then let the implementation use SIMD, threading, blocking, tiling, and platform-specific strategies to compute that expression efficiently.

The key idea, developed through C++ standardization work such as P4016R0 and P4229R0, is reproducibility by reproducing the computation. Instead of asking the implementation to promise a particular schedule, we give the calculation a named expression. Once that expression is chosen, changing the thread count, vector width, chunking, or blocking strategy does not silently change the answer.

A reproducible scan makes this harder than reduce because it does not expose only one final value. It exposes every prefix. A reproducible final sum is not enough if the intermediate results still drift. We will show how expression and observation contracts make those prefixes reproducible without forcing the computation back into a slow sequential order.

Then we go below the algorithm layer, to the places where bits usually escape: FMA contraction, denormals, floating-point environment choices, math-library approximations, and vectorized transcendental functions. The goal is not to get the same answer by turning off the hardware. We will show reproducible vectorized primitives, including transcendental functions, running at speeds comparable to established vector math libraries while preserving a cross-platform numerical contract.

Finally, we put the whole stack under stress: a heterogeneous numerical pipeline across x86-64, Apple Silicon, and CUDA. The data is deliberately hostile, with high cancellation rates and fragile intermediate states. The aim is not to pass friendly benchmark cases, but to reproduce the specified computation, including the same intermediate failures, not just the same final answer, bit for bit, across CPUs, GPUs, and toolchains.

Presenters
avatar for Andrew Drakeford

Andrew Drakeford

Director, UBS
Andrew Drakeford A Physics PhD who started developing C++ applications in the early 90s at British Telecom labs. For the last two decades, he has worked in finance developing efficient calculation libraries and trading systems in C++. His current focus is on making quant libraries... Read More →
Monday September 14, 2026 11:00 - 12:00 MDT
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Tuesday, September 15
 

09:00 MDT

Back to Basics: std::unordered_map
Tuesday September 15, 2026 09:00 - 10:00 MDT
In modern C++, std::unordered_map is the de facto #2 container. Its dominance signifies a fundamental shift in application design: the performance-critical need for O(1) average-case key-value lookups.

Join as we move beyond "just use a hash map" and explore the critical, real-world implications of this choice. We'll start by benchmarking the classic std::map (red-black tree) against std::unordered_map (hash table) to understand exactly what you gain-and what you might lose.

However this power comes with risks. An average-case O(1) can quickly degrade to a catastrophic O(n) without warning. We will profile and dissect the actual costs of using a hash map:

  • The Hash: What makes a good hash function? We'll go beyond std::hash and see how to write effective, fast hashers.
  • The Collision: How do different collision-handling strategies impact performance and memory?
  • The Re-hash: What is "load factor," and when does the hidden cost of a full table re-hash destroy your performance gains?
We'll conclude with a practical decision-making framework for when to choose std::unordered_map , when to fall back on the ordered std::map , and how std::string -the container we often forget is a container-fits into this modern landscape.

You will leave this session knowing precisely which data structure to deploy for maximum performance.

Presenters
avatar for Kevin Carpenter

Kevin Carpenter

Software Engineering Manager, EPX
Kevin Carpenter, an experienced Software Engineer, excels in crafting high-availability C++ solutions for Linux and Windows, with expertise in transaction software, financial modelling, and system integration. As a Software Engineering Manager, he ensures secure, high-speed credit... Read More →
Tuesday September 15, 2026 09:00 - 10:00 MDT
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09:00 MDT

Scaling Robotics to 200 Developers: Flexible C++ Architectures for Kinematics, Dynamics, Simulation & Control
Tuesday September 15, 2026 09:00 - 10:00 MDT
Large-scale robotics organizations operate diverse fleets of manipulators — 4-DOF arms on rails, 6-DOF standard manipulators on pedestals and fully mobile manipulators — each with different kinematics, hardware vendors, and software teams and researchers.

And engineers and researchers are opinionated.

As a team eventually you have one goal. Re-use as many abstractions; ideas and algorithms as you can while still allowing you the flexibility to explore new algorithms; ideas and approaches.

This talk presents a layered C++ architecture that solves this at scale. We present our core abstrcactions; a header-only Lie group library provides shared spatial math types (SE(3) poses, twists, wrenches); a trajectory library for motion planners and controllers; and a collision detection library from the same.

We will discuss how we moved from virtual functions to C++ concepts with zero overhead and the learnings along the way that allow us to write planning and control algorithms for various robots morphologies and sensing paradigms.

Critically, this architecture balances the needs of production at scale while enabling experimentation: researchers can prototype new collision algorithms, try a new physics engine, or test a novel trajectory representation — all without disrupting production code. The backend boundaries are where new ideas enter the system. You'll leave with three distinct C++ patterns for backend abstraction — compile-time traits, runtime interfaces, and type erasure — and an understanding of when to use each based on performance requirements and the need for experimentation.

Presenters
CS

Carl Saldanha

Carl Saldanha, is a Senior Robotics Engineer at Amazon.com focused on Manipulation at Scale
Tuesday September 15, 2026 09:00 - 10:00 MDT
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14:00 MDT

Breaking the Speed Limit: Building a High-Throughput Hashing Engine With C++26
Tuesday September 15, 2026 14:00 - 15:00 MDT
Modern storage hardware has evolved at a breakneck pace. PCIe Gen 5 NVMe drives can push data at 10 GB/s, yet standard C++ file abstractions often leave them starving for data. Many developers think they need to abandon portability in favor of unmaintainable, OS-specific kernel bypasses to achieve the throughput necessary to saturate these drives. This session is for developers writing high-throughput, performance-critical applications who want to hit bare-metal speeds without sacrificing clean architecture, cross-platform support, or type safety.

Using a high-throughput cryptographic hashing engine as a concrete case study, this presentation demonstrates how to design a hardware-saturating data pipeline built entirely on the idioms of C++26. We will explore how the mathematical design of an algorithm - specifically BLAKE3's binary Merkle tree structure - can be mapped directly to wide SIMD vector lanes and concurrent CPU cores. We will walk through an execution model that completely bypasses the OS page cache, orchestrates memory without heap allocations on the hot path, and unifies OS kernel quirks in a portable way.

By the end of this presentation, you will learn how to replace rigid thread pools with lock-free, asynchronous execution graphs using Sender/Receiver paradigms (std::execution) and vectorization (std::simd). Crucially, we will focus on the build engineering required to make this work today. We will cover how to use advanced CMake tooling to safely compile multi-architecture vector binaries from a single source of truth, how to prevent LTO cross-contamination, and how to structure your pipeline today to seamlessly absorb upcoming C++ features in a world of trailing vendor toolchains.

Presenters
YS

Yannic Staudt

co-founder, tipi.build
Tuesday September 15, 2026 14:00 - 15:00 MDT
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15:15 MDT

Lock-Free Timer Scheduling With C++ Atomics
Tuesday September 15, 2026 15:15 - 16:15 MDT
Applications that present rapidly changing market data to human users face a practical challenge: updates may arrive thousands of times per second, but humans only benefit from periodic refreshes. Efficiently coalescing and scheduling that work without overwhelming CPU resources becomes a concurrency problem rather than simply a rendering problem.

This talk demonstrates how modern C++ atomics can be used to build a lock-free timer scheduler optimized for extremely high update rates. The scheduler follows a single-producer, multiple-consumer design in which work items represent recurring tasks that must execute periodically. Consumers process scheduled work and re-schedule it for future execution without relying on traditional locks or centralized coordination.

The most unusual aspect of the design is its “reverse work stealing” behavior: consumers can proactively give away work to other consumers and become idle themselves. Rather than distributing work evenly across all threads, the scheduler attempts to pack work onto as few cores as possible, reducing idle spinning, lowering CPU utilization, and improving cache locality. Because tasks may have highly variable execution times, the scheduler must also prevent pathological cases where work is endlessly redistributed between consumers.

Attendees will learn how atomics, lock-free forward lists, and memory ordering can be combined to implement high-throughput schedulers with predictable latency characteristics. The talk also discusses practical tradeoffs, implementation challenges, and performance measurements from production-inspired workloads, including producer throughput of approximately 50 million scheduled tasks per second and consumer processing throughput approaching 700 million tasks per second, while keeping migrated work items below 1% in typical workloads.

Presenters
MG

Maxim Gurschi

Maxim Gurschi is a senior software engineer on the FXGO team at Bloomberg, where he is focused on building scalable, high-performance trading systems for electronic foreign exchange trading. In this role, he explores practical applications of modern C++ (20 and above) in latency-sensitive... Read More →
Tuesday September 15, 2026 15:15 - 16:15 MDT
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Wednesday, September 16
 

09:00 MDT

Ranges Without Compromise: Designing for Simplicity, Performance, and Composability
Wednesday September 16, 2026 09:00 - 10:00 MDT
Range views enable a “no raw loops” style of programming — not as a matter of taste, but as a pragmatic way to reuse well-tested algorithms to write code faster, express intent clearly, and avoid common bugs. In practice, however, developers often run into issues that may lead them to abandon ranges altogether:

  • unintuitive behavior and surprising limitations
  • slower compilation and runtime performance compared to raw loops
  • high complexity when implementing custom views
In this talk, we’ll distill the core design choices behind these problems — and the alternatives that avoid them. In particular, we’ll compare:

  • iterators and indices
  • external and internal iteration
  • transformations of nested views that overcome limitations of internal iteration
Attendees will leave with practical insights for designing and using range abstractions, along with examples of libraries that embody these ideas.

Presenters
avatar for Oleksandr Bacherikov

Oleksandr Bacherikov

Software Engineer
Oleksandr Bacherikov is a software engineer with over a decade of experience building low-latency machine learning and computer vision systems for mobile devices and AR glasses. He is particularly interested in designing abstractions that make complex algorithms simple, efficient... Read More →
Wednesday September 16, 2026 09:00 - 10:00 MDT
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15:15 MDT

Writing High Performance Parsers Using State Machines
Wednesday September 16, 2026 15:15 - 16:15 MDT
Starting from the simple objective of writing an optimized lexer we will grapple with their fundamental performance factor: branch prediction. We will investigate how lookup tables can improve (or hurt) the CPUs prediction capabilities with some unexpected results. Over time our design evolves by combining parsing and lexing into a single step in a way that is as fast as just a standalone lexer. A central aspect of the design will be a primitive parsing state machine from which the parser source code is generated.

After the talk attendees will have a better understanding of some advanced branch prediction techniques and should have some new ideas for their present or future parsing endeavors.

Presenters
TT

Torben Thaysen

Torben Thaysen was passionate about software from a young age with his earliest C++ experiments dating back over 10 years. After acquiring his masters degree in physics he returned to his passion and became a C++ developer currently with 2 years experience under his belt. Now Torben... Read More →
Wednesday September 16, 2026 15:15 - 16:15 MDT
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Thursday, September 17
 

09:00 MDT

Back to Basics: Loops in C++
Thursday September 17, 2026 09:00 - 10:00 MDT
A fundamental control structure of each programming language are loops. And we all expect them to be simple and self explanatory. However, C++ would not be C++, if there would be no tricky details to learn and respect about loops in C++.

This talk takes its time to discuss the various ways and approaches to program loops in C++. Beside basic while and for loops, we talk about the range-based for loop, and all the extensions recently added to these control structures.

In addition, we will look at other ways to program loops in C++, such as using algorithms and how to deal with parallel computing in a loop.

As a result you get a deeper understanding of the various ways loops can be programmed in Modern C++ so that you know better how to use them in practice.

Presenters
Thursday September 17, 2026 09:00 - 10:00 MDT
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09:00 MDT

Writing Low-Latency C++: Predictability, Cache, and the Architectures Underneath
Thursday September 17, 2026 09:00 - 10:00 MDT
In low-latency C++, correctness is table stakes. What separates good systems from great ones is predictability — the ability to hit your deadline not just on average, but at the 99th and 99.9th percentile, where real workloads live. Latency is a feature, and if you don't design for it explicitly, you lose it accidentally.

This talk is a practitioner's guide to writing C++ that behaves predictably under load, drawn from experience building and tuning low-latency systems on Microsoft's Azure Core platform. We start from the mental models that matter most — CPU-centric thinking, the latency stack from L1 to DRAM, and why minimizing work, unpredictability, and memory movement is the foundation of everything else — and then work through the layers of the stack where latency is won or lost in practice.

Through live demos and benchmark data on both x86 and ARM, we'll cover:

STL containers as latency contracts — why most latency bugs start with the wrong container, the real cost of dynamic reallocation, and the measurable wins from reserve() and custom allocators.

Memory layout and cache behavior — struct layout and alignment (and how it differs on x86-64 vs. ARM64), AoS vs. SoA trade-offs, hot/cold data separation, false sharing, NUMA, and TLB pressure.

Atomics vs. mutexes — when atomics actually lose to mutexes, why architecture and memory model dictate the answer, and how to choose between them in real code.

Threading and scheduling — fixed vs. dynamic thread pools, context-switch and migration costs, and why understanding the OS is half the battle.

Benchmarking and observability — why microbenchmarks lie, how to avoid measurement bias and jitter, why latency histograms beat averages, and why "absolute benchmark" is a myth.

You'll leave with a practical playbook for designing and measuring low-latency C++ systems, an honest understanding of why benchmarks from one machine rarely generalize to another, and a sharper instinct for the silent killers — allocations, branches, cache misses, and synchronization primitives — that don't show up in code review but do show up in production.

Presenters
avatar for Sampad Acharya

Sampad Acharya

Senior Quant Developer, Fixed Income Trading, Bloomberg
Sampad Acharya is a senior software engineer at Bloomberg, where he specializes in low‑latency, cache‑optimized C++ systems for trading and real‑time environments. He has worked in software development for six years. Sampad is deeply interested in how algorithms behave in the... Read More →
Thursday September 17, 2026 09:00 - 10:00 MDT
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14:00 MDT

What Is Your Algorithmic Core?
Thursday September 17, 2026 14:00 - 15:00 MDT
Production C++ code often hides small but deeply complex algorithms inside layers of engineering: APIs, lifetimes, error handling, integration, logging, and glue code. We test classes and systems, but rarely the algorithm itself in isolation.

Off-by-one errors and broken or missing invariants can survive extensive pre-production testing. Line coverage does not imply branch coverage. Branch coverage does not imply coverage of algorithmic corner cases. Testing through a wide public API often obscures the mathematical structure of the problem, making subtle bugs difficult to discover through multiple layers of abstraction.

This talk explores how to extract an "algorithmic core" from a larger component. Its correctness is fundamentally mathematical and largely language-agnostic rather than C++-specific.

Using examples such as substring matching, topological sorting variations, and lazy evaluation on trees, we will examine how problem corner cases differ from implementation corner cases, and how easily some of them are skipped.

We will discuss:

  • Recognizing when an algorithm is entangled with boilerplate
  • Extracting core logic without introducing accidental complexity
  • What it takes to test algorithmic code in isolation
  • Raising the level of abstraction to make reasoning easier without merely relocating complexity
  • Using LLMs to assist in exploring and validating implementations
  • Gradual rollout and comparison of competing implementations
Presenters
ES

Egor Suvorov

Senior Software Engineer, Bloomberg
Egor Suvorov is a senior software engineer at Bloomberg, where he works on DataLayer, the company's real-time streaming data transformation pipeline. Previously, he led a freshman C++ course, where his students uncovered and reported dozens of bugs in various C++ tools. Egor was also... Read More →
Thursday September 17, 2026 14:00 - 15:00 MDT
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14:00 MDT

When Zero-Cost Abstractions Aren’t Zero-Cost
Thursday September 17, 2026 14:00 - 15:00 MDT
Zero-cost abstractions are a foundational idea in C++, promising expressive, high-level code without sacrificing performance. However, developers often encounter unexpected costs when using modern abstractions in practice, even when the code appears idiomatic and well-designed.

This talk explores the assumptions behind zero-cost abstractions and examines what happens when those assumptions no longer hold. Through concrete examples drawn from modern C++ — including ranges and views, type erasure, allocators, and other common abstractions — we will examine how factors such as optimizer visibility, inlining boundaries, allocation behavior, and runtime flexibility influence performance.

This talk treats abstraction as a powerful engineering tool, examining the limits of its zero-cost guarantees in real-world systems. We will look at how seemingly small design choices can introduce hidden costs, why those costs are often difficult to spot through inspection alone, and how to recover performance without abandoning good design or readability.

Attendees will leave with a clearer understanding of when abstractions are truly zero-cost, how to recognize situations where they are not, and how to make informed tradeoffs between expressiveness, flexibility, and performance in modern C++.

Presenters
avatar for Steve Sorkin

Steve Sorkin

Senior Software Engineer, Bloomberg
Steve Sorkin has been at Bloomberg since 2019, where he is a senior software engineer. He is enthusiastic about writing clean, scalable, and maintainable code for use in low latency and high throughput applications. Prior to joining Bloomberg, Steve worked as a securities/derivatives... Read More →
Thursday September 17, 2026 14:00 - 15:00 MDT
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15:15 MDT

Leveraging LLM to Generate Unittests for Notifiers in Taskflow
Thursday September 17, 2026 15:15 - 16:15 MDT
Notifiers are a critical synchronization primitive in task-parallel programming systems such as Intel TBB and Taskflow, responsible for efficiently sleeping and waking worker threads as tasks become unavailable and available over and over again, directly impacting scheduler throughput and latency. Correctness here is non-negotiable: a single missed wakeup can significantly hamper the performance of an entire program. Yet writing strong unit tests for notifiers is notoriously difficult, because the bugs they target, lost wakeups, spurious wakes, race conditions, are timing-dependent, non-deterministic, and often only surface under specific thread interleavings that are hard to force reliably.

The problem is compounded in practice. Notifier implementations evolve constantly: small algorithmic tweaks, memory ordering changes, and refactors across systems demand a fresh round of carefully constructed tests. This is tedious, expertise-heavy work that takes a lot of time and engineering effort. In this talk, we explore using Large Language Models (LLMs) to automate the generation of the unit tests for notifiers. Specifically, we will demonstrate how LLM-generated tests, guided by proper prompts can systematically stress the two-phase wait protocol across Notifiers in Taskflow. We will show this in a widely used Notifier implemented in Taskflow. We are able to find an undiscovered bug that has been existing in the project.

Presenters
SS

Snikitha Siddavatam

Snikitha Siddavatam is a Computer Science and Data Science student at the University of Wisconsin-Madison, expected to graduate in May 2027, with coursework spanning machine learning, artificial intelligence, distributed systems, data visualization, and advanced algorithms. Snikitha... Read More →
Thursday September 17, 2026 15:15 - 16:15 MDT
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16:45 MDT

Quicker Than Quick: Using Radix Sort to Make `std::stable_sort` Beat `std::sort`
Thursday September 17, 2026 16:45 - 17:45 MDT
This talk takes you through the research and optimization of radix sort, culminating in its integration into libc++.

You will learn : common pitfalls of radix sort implementations (non-binary digits, dynamic memory allocation, fragile interfaces), how to design a strict and high-performance interface (fixed digit size, external buffer, projection to integers), and how to overcome radix sort's main drawback — its lack of naturalness — with two counter-based optimizations and a hybrid merge scheme.

The result : on arrays of 60 int32 elements (18 for int8), radix sort starts beating std::sort ; on large arrays, it's up to 10x faster. Floating-point types (float/double/float16_t) are also supported via IEEE 754 bit transformations (sign and exponent inversion for negative numbers).

The key takeaway : in modern libc++, for integers and floats, std::stable_sort on random data is noticeably faster than std::sort . Life has become better, but also more complicated — choose your sorting algorithm wisely.

Presenters
DI

Dmitriy Izvolov

C++ Developer
Dmitry Izvolov graduated from MIEM (Moscow Institute of Electronics and Mathematics) with a degree in Applied Mathematics. Since then, he has worked as a programmer across diverse domains: DLP systems, information retrieval, cybersecurity, image processing, and speech synthesis. Currently... Read More →
Thursday September 17, 2026 16:45 - 17:45 MDT
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Friday, September 18
 

10:30 MDT

IEEE 754 Decimals for C++: The Boost.Decimal Library
Friday September 18, 2026 10:30 - 11:30 MDT
Why does 0.1 + 0.2 not equal 0.3? Because binary floating-point cannot exactly represent most decimal fractions, the value 0.1 simply does not exist in IEEE 754 binary. For applications where rounding errors are unacceptable, finance, billing, regulatory reporting, scientific data interchange, this is a structural problem, not a precision setting that can be tuned away. IEEE 754-2008 introduced a decimal floating-point alternative that stores the significand in base 10, and ISO/IEC TR 24733 sketched a C++ binding for it. Compiler support, however, has remained uneven across vendors and architectures.

Boost.Decimal is a header-only, dependency-free, C++14 implementation of IEEE 754-2008 and TR 24733 decimal floating-point. It provides three IEEE-conformant types, decimal32 t, decimal64 t, and decimal128 t, and three companion decimal fast* t types that trade strict bit-layout conformance for speed where you don't need on-the-wire interoperability. All six types behave like built-in floating-point: they're constexpr-friendly throughout, support mixed arithmetic and promotion, and ship with their own implementations of , , , , , hashing, , and Boost.Math integration. The library is tested natively on x86 64, ARM64, and s390x, and under emulation on PPC64LE and ARM Cortex-M.

This talk is the introduction to decimal floating-point that most C++ programmers never got. We'll cover what decimal floating-point actually is at the bit level (BID vs. DPD encodings, the cohort concept that has no analogue in binary), why the standard library's defaults are what they are (e.g. Rounding), and how Boost.Decimal's API maps onto familiar and patterns. We'll work through worked examples, parsing a price feed, computing financial summary statistics through Boost.Math, round-tripping values through while preserving cohort information, and walk through the library's deliberate deviations from both IEEE 754 and the C++ standard, including why floating-point exception flags were sacrificed to keep constexpr and how from_chars was extended to distinguish overflow from underflow as well as preserve cohorts. We'll close with reviews of the benchmarks versus binary floating point, as well as other existing libraries.

By the end, attendees will know when reaching for decimal is the right call, which of the six types fits their workload, and what trade-offs the library made on their behalf.

Presenters
avatar for Matt Borland

Matt Borland

Staff Engineer, The C++ Alliance
Matt Borland earned his bachelor's from the University of Michigan and his master's from the Georgia Institute of Technology, and is currently a doctoral candidate in Electrical and Computer Engineering at Purdue University. He is the author of Boost.Charconv and Boost.Decimal, both... Read More →
Friday September 18, 2026 10:30 - 11:30 MDT
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13:30 MDT

Implementing Async RAII
Friday September 18, 2026 13:30 - 14:30 MDT
C++ lifetime management is fundamentally built around synchronous scope exit. Constructors establish invariants, destructors release resources, and RAII permits ownership and cleanup to compose naturally with ordinary control flow. Asynchronous systems disrupt this model. Destruction may itself require asynchronous work, and “just launch another task in the destructor” quickly turns deterministic lifetime management into unstructured background activity.

This talk explores the implementation of async lifetime management in std::execution, based on the enter/exit scope sender framework proposed in P3955. Rather than treating async construction and destruction as special cases, the model reframes them as composable asynchronous protocols built around explicit async scope entry and exit operations. The talk follows the process of turning these ideas into working code, beginning from the low-level enter/exit sender abstractions and progressively assembling higher-level lifetime facilities on top. Along the way, the implementation uncovers an important self-similarity in the problem domain: Higher-level async lifetime facilities can themselves be expressed in terms of the same lower-level async lifetime primitives.

The implementation discussion focuses on the machinery required to make these guarantees real: Coordinating async teardown within structured concurrency, managing partially-entered scopes, and preserving deterministic cleanup semantics even when destruction itself becomes asynchronous. The resulting design serves both as a practical exploration of async lifetime management and as a case study in how implementing an abstraction can reveal deeper structural properties hiding inside the model itself.

Presenters
avatar for Robert Leahy

Robert Leahy

Robert Leahy is a C++ systems engineer specializing in the design of C++ libraries and high-performance infrastructure. Over the past decade he has built latency-sensitive financial systems, contributed to patented database technology, and developed production software for processing... Read More →
Friday September 18, 2026 13:30 - 14:30 MDT
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13:30 MDT

Modernizing Legacy Codebases without Stopping the World
Friday September 18, 2026 13:30 - 14:30 MDT
Every mature codebase carries history and technical debt. The challenge is modernizing without stopping the world or introducing big re-write failure risks.

In this talk, we’ll explore how to modernize legacy C++ codebases incrementally using a mix of deterministic code transformations and AI-assisted refactoring .

After delving into some of the common problems with legacy modernization, we'll start tackling the simple "boring" stuff that deliver huge leverage of changes via clang tooling . These represent repeatable, deterministic reviewable upgrades that can be automated and applied at scale.

Then we can look at more difficult transformations that can be AI assisted with more aggressive transformations including API improvements and how to prevent it going off the rails. This will be backed by Compiler diagnostics, static analysis and testing to keep changes maintainable and correct .

The goal is not to replace engineering judgment, but to accelerate it: turning modernization into a continuous, low-risk workflow instead of a disruptive project.

Attendees will leave with a repeatable playbook for modernizing legacy codebases incrementally, safely, and at scale—using the right tool for each class of change

Presenters
avatar for Peter Muldoon

Peter Muldoon

Engineering Lead, Bloomberg
Pete Muldoon has been using C++ since 1991. Pete has worked in Ireland, England and the USA and is currently employed by Bloomberg. A consultant for over 20 years prior to joining Bloomberg, Peter has worked on a broad range of projects and code bases in a large number of companies... Read More →
Friday September 18, 2026 13:30 - 14:30 MDT
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